tEDAx - PCB layer stackup

purpose

Focus is on providing a common-minimum layer stackup representation.

layer model

The stackup consists of physical layers, global ("all") layers and virtual layers. Each layer has a name, location, type and a set of properties. Storing/saving/loading layer properties is optional. Layer name is case sensitive.

The layer name is human readable name that may also consists of alphanumeric characters, underscore ("_"), dash ("-") and period ("."). The maximum length of the name is 64 characters. The name may be empty, which is indicated by the special value: a single dash. Layer name is also used for referencing the layer from other objects, thus the name must be unique enough for that.

The layer location (lloc) is one of:

top - physical layer, top side of the board
inner - physical layer, internal layers
bottom - physical layer, bottom side of the board
all - affects all physical layers
virtual - virtual (non-physical) layer, such as documentation

Layer types (ltype) vs. location (combination validity table):

ltype top, bottom inner all virtual description
copper ok ok BAD BAD copper film
insulator BAD ok BAD BAD insulator layer, e.g. substrate, prepreg
silk ok BAD BAD BAD silk-screen graphics
paste ok BAD BAD BAD solder paste
mask ok BAD BAD BAD solder mask cutouts; negative layer: the layer is a solid fill by default and objects drawn on it are clearing the solid fill
umech BAD BAD ok BAD unplated mechanical layer (drills, slots, routed contours)
pmech BAD BAD ok BAD plated mechanical layer (drills, slots, routed contours)
vcut BAD BAD ok BAD unplated V-cut
doc BAD BAD BAD ok human readable documentation

ltype	top, bottom	inner	all	virtual	description
copper	ok	ok	BAD	BAD	copper film
insulator	BAD	ok	BAD	BAD	insulator layer, e.g. substrate, prepreg
silk	ok	BAD	BAD	BAD	silk-screen graphics
paste	ok	BAD	BAD	BAD	solder paste
mask	ok	BAD	BAD	BAD	solder mask cutouts; negative layer: the layer is a solid fill by default and objects drawn on it are clearing the solid fill
umech	BAD	BAD	ok	BAD	unplated mechanical layer (drills, slots, routed contours)
pmech	BAD	BAD	ok	BAD	plated mechanical layer (drills, slots, routed contours)
vcut	BAD	BAD	ok	BAD	unplated V-cut
doc	BAD	BAD	BAD	ok	human readable documentation

The stackup is specified in order from top to bottom, that is layers with lloc=top should be listed first, then layers lloc=inner then lloc=bottom, then lloc=all and finally lloc=virtual. Order of layers within an lloc group matters only in case of lloc=intern.

Except for virtual layers and inner copper layers, each type/lloc combination must have zero or one layer - multiple layers are not permitted. Explicit insulator layers must be present between every two copper layer.

Layers are always drawn positively - there is no negative drawn, subtract, clearing layer. The physical interpretation of some layers are inverted, tho: mask layer objects specify cutouts on the final solder mask material, pmech, umech and vcut layers represent material that are removed (drilled, routed) from the final board.

layer properties

Properties are optional key value pairs from the following table:

key value valid on
thickness integer value in um ltype=copper or ltype=insulator
material human readable text ltype=insulator
dielect dielectric constant (er); unitless decimal number (e.g. 4.4) ltype=insulator
thermk thermal conductivity (k) any
display-color #rrggbb any
fab-color human readable text lloc=top, lloc=bottom

key	value	valid on
thickness	integer value in um	ltype=copper or ltype=insulator
material	human readable text	ltype=insulator
dielect	dielectric constant (er); unitless decimal number (e.g. 4.4)	ltype=insulator
thermk	thermal conductivity (k)	any
display-color	#rrggbb	any
fab-color	human readable text	lloc=top, lloc=bottom

block

Block type is "stackup", version is "v1". The unique identifier should be the human readable name of the stackup.

layer commands

command parameter names explanation
layer name lloc ltype Create a new layer in the layer stack
lprop name key value assign a new layer property to an already existing layer

command	parameter names	explanation
layer	name lloc ltype	Create a new layer in the layer stack
lprop	name key value	assign a new layer property to an already existing layer

minimal support required

Any PCB editor attempting to load a tEDAx stackup needs to understand and support at least the following concepts:

copper layers
insulators - the internal model of the software may ignore them, but it must be able to ignore them on load and auto-generate them on save
silk
umech and pmech layers (it is not required that the software understands the difference between plated and unplated features)
at least 2 copper layers, 2 silk layers and a mechanical layer

Examples

minimal 1 layer, copper-only board on unknown laminate

tEDAx v1

begin stackup v1 1-layer-copper-only
layer circ top copper
layer mech all umech
end stackup

typical 2 layer, 1.6mm thick board for hobbyists

tEDAx v1

begin stackup v1 2-layer-hobby
layer TOP top copper
layer in1 inner insulator
lprop in1 thickness 1600
layer BOT bottom copper
layer holes all umech
end stackup

typical 4 layer board

tEDAx v1

begin stackup v1 4-layer-digital
layer tpaste top paste
layer tmask top mask
lprop tmask fab-color green
layer tsilk top silk
lprop tsilk fab-color white
layer tsignal top copper
lprop tsignal thickness 35
layer in1 inner insulator
lprop in1 thickness 500
layer pwr inner copper
lprop pwr thickness 70
layer in2 inner insulator
lprop in2 thickness 500
layer gnd inner copper
lprop gnd thickness 70
layer in3 inner insulator
lprop in3 thickness 500
layer bsignal bottom copper
lprop bsignal thickness 35
layer bsilk bottom silk
lprop bsilk fab-color white
layer bmask bottom mask
lprop bmask fab-color green
layer bpaste bottom paste
layer uplat all umech
layer plat all pmech
layer comments virtual doc
end stackup